![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
|
|||||
Notes: |
|||||
(1) in relation with STMicroelectronics. NDA required. (2) outcome from a mil project on radar signal processing - only parts from VHDL-code will be available. We are not allowed to distribute all parts via internet. Contact us. (3) in relation with Fast Analog Solutions Ltd. UK, available 2H.2000 (4) in relation with TI (5) research project design-files (Verilog and VHDL) are available for free, contact us |
|||||
last updated: tbd |